Sub-30-nm FUSI CMOS Transistors Fabricated by Simple Method Without Additional CMP Process.

Autor:	Fukutome, Hidenobu, Hosaka, Kimihiko, Kawamura, Kazuo, Ohta, Hiroyuki, Uchino, Yasunori, Akiyama, Shinichi, Aoyama, Takayuki
Předmět:	COMPLEMENTARY metal oxide semiconductors DIGITAL electronics LOGIC circuits TRANSISTOR-transistor logic circuits TRANSISTOR circuits
Zdroj:	IEEE Electron Device Letters; Jul2008, Vol. 29 Issue 7, p765-767, 3p, 2 Black and White Photographs, 1 Diagram, 4 Graphs
Abstrakt:	We fabricated sub-30-nm fully silicide (FUSI) CMOS transistors by a simple method without additional chemical-mechanical-polish and gate-capping-layer processes. The FUSI draped with source/drain (SID) capping layer (D-FUSI) featuring shallow SID Ni silicided layer without modulation of geometric structures is suitable to improve electrical characteristics of the short-channel transistor. Drive currents of 25-nm D-FUSI CMOS transistors increased by 15% more than those of the control. [ABSTRACT FROM AUTHOR]
Databáze:	Complementary Index
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