A 1/2.7-in 2.96 MPixel CMOS Image Sensor With Double CDS Architecture for Full High-Definition Camcorders.

Autor: Takahashi, Hidekazu, Noda, Tomoyuki, Matsuda, Takashi, Watanabe, Takanon, Shinohara, Mahito, Endo, Toshiaki, Takimoto, Shunsuke, Mishima, Ryuichi, Nishimura, Shigeru, Sakurai, Katsuhito, Yuzurihara, Hiroshi, Inoue, Shunsuke
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Zdroj: IEEE Journal of Solid-State Circuits; Dec2007, Vol. 42 Issue 12, p2960-2967, 8p
Abstrakt: A 1/2.7-in 1944 x 1484 pixel CMOS image sensor with double CDS architecture fabricated in a 0.18-μm single-poly triple-metal (1P3M) CMOS process is described. It operates at 48 MHz in a progressive scanning mode at 60 frames/s for full high-definition (HD) imaging. Two transistors/pixel architecture and low optical stack with double microlenses achieve 14.6ke-/lx·s sensitivity and 14ke- saturation. Double CDS architecture with a high-gain column amplifier realized a low noise floor of 3 .5e;ms. Optimized shallow-trench isolation achieved very low dark current of 12.2e- /s (60 °C). This image sensor also realizes low power consumption of 220 mW. [ABSTRACT FROM AUTHOR]
Databáze: Complementary Index