| Abstrakt: |
Flame retardant glass/epoxy composite (FR4) has been extensively used as a substrate material for microelectronic packaging due to its cost effectiveness and overall performance. However, to be able to fabricate high-density wiring with microvias, and embed capacitors, inductors, resistors, and RF and optoelectronic waveguides into a single substrate, we need materials other than FR4 as a base substrate to meet the stringent warpage requirements during fabrication. Typically, these base substrate materials should have a high modulus and good planarity in addition to having a coefficient of thermal expansion (CTE) that is close to that of silicon so that flip-chips can be attached directly to the substrate without the need for an underfill. Although low-CTE and high modulus base substrate materials can result in low warpage and can eliminate the need for an underfill, they can potentially cause delamination and cracking in the interlayer dielectric. This is due to the high CTE mismatch between the base substrate and a typical polymer dielectric. This paper aims to explore a combination of a base substrate material and an interlayer dielectric material such that the warpage is minimal, the dielectric will not crack or delaminate, and the flip-chip solder joints, assembled without an underfill, will not crack prematurely during qualification regimes or operating conditions. Non-linear finite element models with a design-of-simulations approach are used in arriving at optimized thermo-mechanical properties for the base substrate and the dielectric materials to enhance the overall reliability of the integrated substrate with flip-chip assembly. It is seen that an aluminum nitride base substrate with resin-coated foil C provides the best combination against dielectric cracking, high warpage, and solder joint fatigue. The results from the models have also been validated with experimental data. [ABSTRACT FROM AUTHOR] |
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