| Autor: |
Flachs, Brian, Asano, Shigehiro, Dhong, Sang H., Hofstee, H. Peter, Gervais, Gilles, Kim, Roy, Tien Le, Peichun Liu, Leenstra, Jens, Liberty, John, Michael, Brad, Hwa-Joon Oh, Mueller, Silvia Melitta, Takahashi, Osamu, Hatakeyama, A., Watanabe, Yukio, Yano, Naoka, Brokenshire, Daniel A., Peyravian, Mohammad, Vandung To |
| Předmět: |
|
| Zdroj: |
IEEE Journal of Solid-State Circuits; Jan2006, Vol. 41 Issue 1, p63-70, 8p, 1 Black and White Photograph, 4 Diagrams, 4 Charts |
| Abstrakt: |
This paper describes an 11 FO4 streaming data processor in the IBM 90-nm SOI-low-k process. The dual-issue, four-way SIMD processor emphasizes achievable performance per area and power. Software controls most aspects of data movement and instruction flow to improve memory system performance and core performance density. The design minimizes instruction latency while providing for fine grain clock control to reduce power. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
|
