| Autor: |
Bae, S. H., Hillard, R. J., Olsen, C. S., Benjamin, M. C., Thirupapuliyur, S., Ho, N., Kraus, P. A. |
| Předmět: |
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| Zdroj: |
AIP Conference Proceedings; 2005, Vol. 788 Issue 1, p191-193, 3p |
| Abstrakt: |
The replacement of SiO2 by alternative gate dielectrics, such as high-nitrogen content oxynitrides or high-κ metallic oxides (e.g. HfO2), in advanced CMOS technology requires an investigation of the interface quality between the dielectric and the Si substrate. An accurate, precise and convenient metrology for the characterization of the interface trap density (Dit) would be useful to evaluate the hardware, processes and integration schemes for the formation of alternative gate dielectrics. We report the extraction of mid-gap Dit by implementing a well-known conductance method from small-signal measurements of MOS impedance for plasma-nitrided oxynitrides. Here the MOS system is not formed from the fabrication of a device, but through the use of an elastic metal gate (EM-gate) metrology system where measurements are made on unpatterned films. The technique allows rapid evaluation of the interface quality for new gate dielectric materials and processes. © 2005 American Institute of Physics [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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