| Abstrakt: |
In response to the growing demand for advanced memory technologies, this study investigates a 4 Mb phase-change memory (PCRAM) chip employing a carbon-doped Ge2Sb2Te5 (C-GST) dielectric material to achieve multistage storage. The Partial-RESET programming and verification (P&V) method was utilized to effectively create intermediate-resistance states, facilitating multilevel storage. The study focuses on optimizing the key parameters affecting the P&V method to enhance the precision and efficiency of reaching intermediate resistance values. Through comprehensive experimentation on the PCRAM array, this work evaluates the performance of multilevel storage, providing insights into the potential for scalable, high-density memory applications. [ABSTRACT FROM AUTHOR] |
