| Autor: |
Das, Durbanjali, Das, Priyanath, Pal, Pradipta Kumar, Mahto, Kailash kumar, Mahato, Bidyut |
| Předmět: |
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| Zdroj: |
Microsystem Technologies; Oct2024, Vol. 30 Issue 10, p1341-1352, 12p |
| Abstrakt: |
The paper proposes a new multilevel inverter (MLI) topology that is designed to overcome the challenges posed by conventional MLIs, which can have high costs and complexity due to the large number of power components. The proposed MLI is designed to work with both symmetric and asymmetric DC sources, and uses fewer power semiconductor switches compared to recently propose reduced components MLIs. The paper presents the ratio of voltage levels generated per power semiconductor switch, and the gate pulses for the inverter are generated using a DSPACE1103 controller. A prototype of the 7-level inverter is developed, and experimental outcomes are provided to evaluate the simulated results. The paper highlights the importance of reducing the number of power components in MLIs to reduce costs and improve reliability. The proposed MLI offers a promising solution to this challenge, while also maintaining the advantages of MLIs such as reduced harmonic distortion and electromagnetic interference. Overall, the research offers valuable insights into the design and performance of multilevel inverters, and the proposed topology has the potential to be a useful tool for researchers and engineers working in the field of power electronics. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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