Dynamics of Integrated Vertical DMOS Transistors Under 100-ns TLP Stress.

Autor: Moens, Peter, Bychikhin, Sergey, Reynders, Koen, Pogany, Dionyz, Gornik, Erich, Tack, Marnix
Předmět:
Zdroj: IEEE Transactions on Electron Devices; May2005, Vol. 52 Issue 5, p1008-1013, 6p
Abstrakt: On-wafer transmission line pulsing (TLP) measurements and transient interferometrie mapping experiments on vertically integrated DMOS transistors reveal the presence of hot filament hopping between the two parasistic bipolars. The activity of both intrinsic bipolar transistors is dependent on the TLP current. In addition, a traveling filament along the device width is observed, the traveling speed being estimated to be between 370 and 480 m/s. [ABSTRACT FROM AUTHOR]
Databáze: Complementary Index