Image filtering hardware accelerator.

Autor: Kalinin, N., Nikiforov, M., Cherpalkin, A.
Předmět:
Zdroj: AIP Conference Proceedings; 2023, Vol. 2812 Issue 1, p1-7, 7p
Abstrakt: This article discusses the use of FPGAs in image processing using matrix filters as an example, and vector filters have been developed. The features of processing on integrated circuits were also analyzed. A window application in the C++ language has been created, which allows preliminary preparation for processing on an FPGA. A description in the Verilog language has been developed that allows you to apply sharpness and blur filters to the input image. [ABSTRACT FROM AUTHOR]
Databáze: Complementary Index