| Autor: |
Vasundhara Patel, K. S., Kumar, Niranjan |
| Předmět: |
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| Zdroj: |
Journal of Circuits, Systems & Computers; Aug2023, Vol. 32 Issue 12, p1-14, 14p |
| Abstrakt: |
This paper demonstrates a low power, frequency compensated with on-chip capacitor, low dropout linear voltage regulator. The proposed low dropout regulator (LDO) delivers a constant output voltage of 2.4V for an input range of 2.5–6.8V. A minimal drop of 2mV and 20mV was observed at no load and full load output current of 0 A to 100mA, respectively. LDO is realized by a high-gain two-stage error amplifier, internally compensated by passive a high-pass filter to achieve stability over a load current range of 0–100mA without occupying as much area as an active high-pass filter. The LDO presented requires a bias current of 10 mA with a reference voltage of 1.5V and is designed in 180-nm technology. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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