| Autor: |
Sampson, Jenyfal, P., Sivakumar, S. P., Velmurugan, S., Ashokkumar |
| Zdroj: |
SILICON (1876990X); May2023, Vol. 15 Issue 7, p3201-3214, 14p |
| Abstrakt: |
This article talks about optimization of a p-channel Gate All Around Stacked Nano Sheet Thin Film Transistor (GAA SNSTFT) using Titatium Nitride (TiN) as the gate material. The study begins with comparing Polysilicon and TiN as gate materials, for which gate dielectrics SiO2 and HfO2 are individually compared. The design model involves the stacking of two channels. TiN provides higher gate controllability in both the channel regions, for which the electrostatic potential variation has been examined by varying its thickness. The IV characteristics have also been evaluated with varying TiN thicknesses, for a gate length of 1 µm. The Drift Diffusion and Shockley–Read–Hall Recombination (SRH) models in Sentaurus Technology Computer Aided Design (TCAD) tool are incorporated for designing and simulating all the structures. After performing the device simulation, the proposed structure has been furthered into developing an Inverter and a 6T SRAM circuit having different gate lengths and TiN thicknesses. By doing so, the Voltage Transfer Characteristics (VTC) for the designed circuit is measured and analysed, concurrently observing deteriorations at lower gate lengths, due to Short Channel Effects (SCE). For the Inverter there are 5% and 12% improvements in NMH and NML correspondingly. Similarly, for the 6T SRAM there is a 14% increase in the Read Static Noise Margin (RSNM), while using a TiN thickness of 2 nm when compared to that of 20 nm. The results demonstrate the compatibility of the proposed device for low-power display applications such as AMOLED. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
|
Full text from SpringerLink