| Autor: |
Wang, Yujun, Wan, Lixi, Wang, Zhengli, Zhang, Haitao, Song, Yunqian, Zhang, Xiaobin, Jin, Zhi |
| Předmět: |
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| Zdroj: |
Electronics (2079-9292); Feb2023, Vol. 12 Issue 3, p696, 15p |
| Abstrakt: |
This article presents an on-chip state-adjustable 8 GHz~12 GHz low-noise amplifier (LNA). It has two characteristics. First, an improved current reuse topology is proposed. By connecting a small capacitor in parallel with the drain of the first-stage transistor, the bandwidth is expanded and the in-band flatness is improved. Second, an innovative adaptive bias circuit is designed to cope with the influence of temperature and process on the performance of the amplifier, and a design method for on-chip adjustment of the chip state is proposed for the first time. As a result of these technologies, the chip area is 1.1 mm × 0.8 mm, the chip provides 24.4 dB nominal gain with merely 0.75 dB noise at 10 GHz, and yields 14.5 dBm output power at 1 dB compression point (OP1dB) when biased at 30 mA quiescent current, meanwhile, gain, OP1dB, and quiescent current can be adjusted on-chip. This design improves the comprehensive performance of X-band LNA and provides more flexibility for system engineers in application. The chip is fabricated using Win Semiconductors' 0.15 um InGaAs pHEMT E-mode process. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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