Protection of FPGA IP core using lock and unlock mechanism.

Autor: Perumal, Vivek Karthick, Sundaralingam, Sivaranjani, Jafarali, Mohammed Naveeth, Krishnan, Thiruvenkadam
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Zdroj: AIP Conference Proceedings; 9/30/2022, Vol. 2515 Issue 1, p1-8, 8p
Abstrakt: The Binding scheme of FPGA devices safeguard IP from being copied or being used for integration from unauthorized. We come up with methods to show how the FPGA devices are embedded with PUF, to lock and unlock FPGA IPs and to analyse of our PUF-FSM binding method security. Without the authorization of the FPGA vendor, no one can access the FPGA device, after the process of locking. [ABSTRACT FROM AUTHOR]
Databáze: Complementary Index