| Autor: |
한 희 재, 김 남 윤, 김 창 우 |
| Předmět: |
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| Zdroj: |
Journal of Korean Institute of Electromagnetic Engineering & Science / Han-Guk Jeonjapa Hakoe Nonmunji; Apr2022, Vol. 33 Issue 4, p300-304, 5p |
| Abstrakt: |
Using the 28 nm complementary metal-oxide semiconductor (CMOS) process, a multi-loop low drop-out voltage (LDO) regulator circuit was designed for use in a wireless power transmission receiver integrated circuit. The LDO regulator uses two differential error amplifiers to provide a stable output voltage to the load with a common source P-channel MOS circuit between the two amplifiers to improve the voltage variation rate (line regulation). The LDO regulator produces an output voltage of 1.2 V from an input voltage range of 1.3～2.1 V and voltage variation rate of 5.88 mV/V. The output voltage variation rate according to the load current change (load regulation) was 3.3367 mV/mA, and a PSRR of −42 dB was obtained. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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