| Autor: |
Dartizio, Simone M., Tesolin, Francesco, Mercandelli, Mario, Santiccioli, Alessio, Shehata, Abanob, Karman, Saleh, Bertulessi, Luca, Buccoleri, Francesco, Avallone, Luca, Parisi, Angelo, Lacaita, Andrea L., Kennedy, Michael P., Samori, Carlo, Levantino, Salvatore |
| Předmět: |
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| Zdroj: |
IEEE Journal of Solid-State Circuits; Jun2022, Vol. 57 Issue 6, p1723-1735, 13p |
| Abstrakt: |
This work introduces a bang-bang fractional- $N$ phase-locked loop with quantization noise shaping that overcomes the classical noise limit of a standard bang-bang phase detector. An adaptive algorithm, working in the background of the main system, guarantees optimal noise shaping across process and environmental variations. The prototype, implemented in a standard 28-nm CMOS process, has a core area of 0.21 mm2 and achieves an rms jitter (integrated from 1 kHz to 100 MHz) of 69.5 fs for integer- $N$ synthesized channels, 79.7 fs for typical fractional- $N$ channels, and 99.6 fs for near-integer fractional channels with a worst case fractional spur of −51.1 dBc. The power consumption is 10.8 mW, leading to a jitter-power figure of merit of −252.8 dB and −251.6 dB for integer- $N$ and fractional- $N$ channels, respectively. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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