| Autor: |
Hyun-Yeop Lee, Jin-Seop Lee, Chang-Kyun Noh, Ho-Jin Kang, Seong-Tae Kim, Ho-Seon Baek, Young-Jin Kim, Choon-Sik Cho |
| Předmět: |
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| Zdroj: |
Journal of Electromagnetic Engineering & Science; Mar2022, Vol. 22 Issue 2, p129-137, 9p |
| Abstrakt: |
In this paper, an energy-efficient switching scheme with additional quarter-reference voltage sources in a successive approximation register (SAR) analog-to-digital converter (ADC) is proposed for a low power and small area device for frequency modulated continuous wave (FMCW) radar transceivers. Recently, state-of-the-art ADCs have adopted a configuration that also uses Vref/2 as the reference voltage of the ADCs to improve the switching energy of capacitive digital-to-analog converter (CDAC). The proposed switching configuration additionally uses Vref/4 and 3Vref/4 reference voltages as the reference voltage of CDAC. Compared to state-of-the-art configurations that use the additional reference voltage of Vref /2, the average switching energy, and the total capacitance of CDAC in the proposed configuration are reduced by about 87.5% and 50%, respectively. In this switching scheme, the CDAC output voltage gradually converges to Vref/2, like with conventional SAR ADCs, which minimizes the dynamic offset that deteriorates the linearity of the SAR ADC. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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