| Autor: |
Ryabtsev, V. G., Volobuev, S. V. |
| Předmět: |
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| Zdroj: |
Russian Microelectronics; Dec2021, Vol. 50 Issue 7, p504-508, 5p |
| Abstrakt: |
The amount of onboard memory is increasing in modern digital systems on a chip (SoC). It occupies a significant area on the chip, which leads to new manufacturing defects and reduces the yield of suitable systems. This paper proposes an architecture of built-in self-repair (BISR) tools, which ensures the restoration of the operability of the system's RAM on a chip in the case of multiple failures due to the reconfiguration of the main and backup memory. An SoC random access memory microcircuit containing the main and backup memory, as well as built-in self-test (BIST) and BISR tools, is considered. The design of the built-in means of the self-repair of the RAM with the automatic restoration of operability in the case of four failures is verified. It is shown that this technical solution reduces the weight of the product compared to devices with majority redundancy, since not all memory is reserved, but only the main components most susceptible to failures. The operable state of the memory of the digital system on a chip was restored automatically without the participation of personnel. The built-in means of self-testing and self-repair of RAM can be used in digital systems for industrial and special purposes, including space systems with a long active life. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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