A Fully Integrated 5-mW, 0.8-Gbps Energy-Efficient Chip-to-Chip Data Link for Ultralow-Power IoT End-Nodes in 65-nm CMOS.

Autor: Okuhara, Hayate, Elnaqib, Ahmed, Dazzi, Martino, Palestri, Pierpaolo, Benatti, Simone, Benini, Luca, Rossi, Davide
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Zdroj: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Oct2021, Vol. 29 Issue 10, p1800-1811, 12p
Abstrakt: The increasing complexity of Internet-of-Things (IoT) applications and near-sensor processing algorithms is pushing the computational power of low-power, battery-operated end-node systems. This trend also reveals growing demands for high-speed and energy-efficient inter-chip communications to manage the increasing amount of data coming from off-chip sensors and memories. While traditional microcontroller interfaces such as SPIs cannot cope with tight energy and large bandwidth requirements, low-voltage swing transceivers can tackle this challenge, thanks to their capability to achieve several Gbps of the communication speed at milliwatt power levels. However, recent research on high-speed serial links focused on high-performance systems, with a power consumption significantly larger than the one of low-power IoT end-nodes, or on stand-alone designs not integrated at a system level. This article presents a low-swing transceiver for the energy-efficient and low-power chip-to-chip communication fully integrated within an IoT end-node system-on-chip, fabricated in CMOS 65-nm technology. The transceiver can be easily controlled via a software interface; thus, we can consider realistic scenarios for the data communication, which cannot be assessed in stand-alone prototypes. Chip measurements show that the transceiver achieves $8.46\times $ higher energy efficiency at $15.9\times $ higher performance than a traditional microcontroller interface such as a single-SPI. [ABSTRACT FROM AUTHOR]
Databáze: Complementary Index