| Autor: |
Pham, Xuan Thanh, Nguyen, Van-Nhan, Kim, Jie-Seok, Lee, Jong-Wook |
| Zdroj: |
IEEE Transactions on Circuits & Systems. Part II: Express Briefs; Jun2021, Vol. 68 Issue 6, p1793-1797, 5p |
| Abstrakt: |
To realize an ultralow-power, low-noise amplifier for bio-potential recording, we investigate three design techniques. The first technique uses a noise-efficient squeezed inverter (SQI) stage biased at the supply of the 2VDSAT saturation limit. The challenge of interfacing the SQI stage with such a low supply is addressed by proposing a new capacitively-coupled chopper instrumentation amplifier (CCIA) with a low-noise DC servo loop (L-DSL) and an embedded ripple reduction loop (E-RRL). The second technique is reducing the high noise contribution of the conventional DSL. The proposed L-DSL reduces the input-referred noise (IRN) by removing the charge dividing effect. The proposed E-RRL inserted inside the gain stage cancels the offset and achieves a ripple suppression without loading the output. The CCIA is implemented using a 0.18 μm CMOS process. The measured results show that the L-DSL successfully creates a sub-Hz high-pass corner needed to block the electrode offset. The E-RRL achieves a ripple suppression of 39 dB. The CCIA achieves 32 nV/√Hz noise density, which is slightly increased to 38 nV/√Hz when the L-DSL is enabled. The integrated noise over 800 Hz bandwidth is 0.9 and 1.1 μVrms without and with the L-DSL, respectively. The mid-band gain of 39.6 dB is achieved by consuming 0.52 μW. These results correspond to a favorable noise efficiency factor (NEF) of 2.1 and a power efficiency factor (PEF) of 1.2. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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