| Autor: |
Kar, Bapi, Gopalakrishnan, Pradeep Kumar, Bose, Sumon Kumar, Roy, Mohendra, Basu, Arindam |
| Předmět: |
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| Zdroj: |
IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Dec2020, Vol. 28 Issue 12, p2518-2529, 12p |
| Abstrakt: |
In this article, we present a low-power (LP) anomaly detection integrated circuit (ADIC) based on a one-class classifier (OCC) neural network. The ADIC achieves LP operation through a combination of: 1) careful choice of algorithm for online learning and 2) approximate computing techniques to lower average energy. In particular, online pseudoinverse update method (OPIUM) is used to train a randomized neural network for quick and resource-efficient learning. An additional 42% energy saving can be achieved when a lighter version of OPIUM method is used for training with the same number of data samples lead to no significant compromise on the quality of inference. Instead of a single classifier with large number of neurons, an ensemble of $K$ base learner (BL) approach is chosen to reduce learning memory by a factor of $K$. This also enables approximate computing by dynamically varying the neural network size based on anomaly detection. Fabricated in 65-nm CMOS, the ADIC has $K=7$ BLs with 32 neurons in each BL and dissipates 11.87 and 3.35 pJ/OP during learning and inference, respectively, at $V_{\text {dd}}=0.75\,\,\text {V}$ when all seven BLs are enabled. Furthermore, evaluated on the NASA bearing data set, approximately 80% of the chip can be shut down for 99% of the lifetime leading to an energy efficiency of 0.48 pJ/OP, an $18.5 \times $ reduction over full-precision computing running at $V_{\text {dd}}=1.2 \,\, \text {V}$ throughout the lifetime. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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