| Autor: |
Efanov, D. V., Sapozhnikov, V. V., Sapozhnikov, Vl. V. |
| Předmět: |
|
| Zdroj: |
Èlektronnoe Modelirovanie; 2020, Vol. 42 Issue 5, p38-50, 13p |
| Abstrakt: |
Error correction circuit typical structures are described — majority and duplication structure with control by parity. A new structure of the correction circuit based on duplication with weighted-transitions sum code control is proposed. The code is constructed by weighting the transitions between the adjacent bits in data vectors, numbers from sequentially increasing powers of the number «two», starting from the zero degree. The specified code detects any errors in data vectors, except for errors associated with distortions of all data bits at the same time. The weighted sum code features allow it to be used in the synthesis of error detection circuits. An example of the correction circuit synthesis is given. The experiments results using control combinational circuits MCNC Benchmarks showed that the duplication structure with weighted-transitions sum code control in many cases allows one to obtain lower complexity indicators values of the correction circuits technical implementation than the known structure of majority correction. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
|
