| Autor: |
Balaji Girisankar, Sree, Nasseri, Mona, Priscilla, Jennifer, Lin, Shu, Akella, Venkatesh |
| Zdroj: |
IEEE Transactions on Circuits & Systems. Part II: Express Briefs; Nov2019, Vol. 66 Issue 11, p1815-1819, 5p |
| Abstrakt: |
A novel approach to implementing Galois field Fourier transform (GFT) is proposed that completely eliminates the need for any finite field multipliers by transforming the symbols from a vector representation to a power representation. The proposed method is suitable for implementing GFTs of prime and nonprime lengths on modern FPGAs that have a large amount of on-chip distributed embedded memory. For GFT of length 255 that is widely used in many applications, the proposed memory-based implementation exhibits 25% improvement in latency, 27% improvement in throughput, and 56% reduction in power consumption compared to a finite field multiplier-based implementation. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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