| Autor: |
Nepomnyashchiy, Oleg V., Krasnobaev, Yuri V., Yablonsky, Aleksey P., Potekhin, Vyacheslav V., Sirotinina, Natalia J. |
| Předmět: |
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| Zdroj: |
EAI Endorsed Transactions on Scalable Information Systems; 2019, Vol. 6 Issue 23, p1-8, 8p |
| Abstrakt: |
This paper describes a solution suggested to minimize the finite transient duration of a switched voltage regulator (SVR) for step changes in load current. SVR control laws aimed at minimizing the transient time are synthesized, and the microprocessor-based architecture and operating algorithms of the control system are designed. The prototype of the SVR digital control unit is implemented on the field-programmable gate array integrated circuit Cyclone III EP3C120F780 using the NIOS II soft-processor core. Embedded software is developed to calculate the control pulse duration for power switches in accordance with the synthesized control laws taking into account the feedback loop signal. A case study of the prototype shows that it provides the duration of transients caused by a load current step change, equal to 3-4 conversion periods at the frequency of 120 kHz. It confirms the suitability of the developed models, algorithms and control laws for ensuring the minimum transient duration. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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