| Autor: |
임정택, 최한웅, 이은규, 최선규, 송재혁, 김상효, 이동주, 김완식, 김소수, 서미희, 정방철, 김철영 |
| Zdroj: |
Journal of Korean Institute of Electromagnetic Engineering & Science / Han-Guk Jeonjapa Hakoe Nonmunji; Nov2018, Vol. 29 Issue 11, p834-841, 8p |
| Abstrakt: |
A power amplifier for subgigahertz short-range wireless communication using 0.18-μm CMOS technology is presented. It is designed as a differential structure to form easily a virtual ground node, to increase output power, and to design a cascode structure to prevent breakdown. The transistor gate width was determined to maximize the output power and power-added efficiency(PAE), and the balun was optimized through electromagnetic simulation to minimize the loss caused by the matching network. This power amplifier had a gain of more than 49.5 dB, a saturation power of 26.7 dBm, a peak PAE of 20.7 % in the frequency range of 860 to 960 MHz, and a chip size of 2.14 mm2. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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