| Autor: |
Lin, Chien-Hsueh, Tsai, Chih-Ying, Lee, Kao-Chi, Yu, Sung-Chu, Liau, Wen-Rong, Hou, Alex Chun-Liang, Chen, Ying-Yen, Kuo, Chun-Yi, Lee, Jih-Nung, Chao, Mango C.-T. |
| Předmět: |
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| Zdroj: |
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; Oct2018, Vol. 37 Issue 10, p2139-2151, 13p |
| Abstrakt: |
To measure the variation of device $V_{t}$ requires long test for conventional wafer acceptance test (WAT) test structures. This paper presents a framework that can efficiently and effectively obtain the mean and variance of $V_{t}$ for a large number of designs under test (DUTs). The proposed framework applies the model-based random forest as its core model-fitting technique to learn a model that can predict the mean and variance of $V_{t}$ based only on the combined $I_{d}$ measured from parallel connected DUTs. The proposed framework can further minimize the total number of $I_{d}$ measurement required for prediction models while limiting their accuracy loss. The experimental results based on the SPICE simulation of a UMC 28-nm technology demonstrate that the proposed model-fitting framework can achieve a more than 99% ${R}$ -squared for predicting either $V_{t}$ mean or $V_{t}$ variance. Compared to conventional WAT test structures using binary search, our proposed framework can achieve a $120.3 \times$ speedup on overall test time for test structures with 800 DUTs. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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