| Autor: |
Wang, S., Mirkhani, V., Yapabandara, K., Cheng, R., Hernandez, G., Khanal, M. P., Sultan, M. S., Uprety, S., Shen, L., Zou, S., Xu, P., Ellis, C. D., Sellers, J. A., Hamilton, M. C., Niu, G., Sk, M. H., Park, M. |
| Předmět: |
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| Zdroj: |
Journal of Applied Physics; 2018, Vol. 123 Issue 16, pN.PAG-N.PAG, 10p, 1 Black and White Photograph, 2 Diagrams, 17 Graphs |
| Abstrakt: |
We report on the fabrication and electrical characterization of bottom gate thin-film transistors (TFTs) based on a sol-gel derived ZnO channel layer. The effect of annealing of ZnO active channel layers on the electrical characteristics of the ZnO TFTs was systematically investigated. Photoluminescence (PL) spectra indicate that the crystal quality of the ZnO improves with increasing annealing temperature. Both the device turn-on voltage (Von) and threshold voltage (VT) shift to a positive voltage with increasing annealing temperature. As the annealing temperature is increased, both the subthreshold slope and the interfacial defect density (Dit) decrease. The field effect mobility (μFET) increases with annealing temperature, peaking at 800 °C and decreases upon further temperature increase. An improvement in transfer and output characteristics was observed with increasing annealing temperature. However, when the annealing temperature reaches 900 °C, the TFTs demonstrate a large degradation in both transfer and output characteristics, which is possibly produced by non-continuous coverage of the film. By using the temperature-dependent field effect measurements, the localized sub-gap density of states (DOSs) for ZnO TFTs with different annealing temperatures were determined. The DOSs for the subthreshold regime decrease with increasing annealing temperature from 600 °C to 800 °C and no substantial change was observed with further temperature increase to 900 °C. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
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