| Autor: |
Guang-Ming Tang, Pei-Yao Qu, Xiao-Chun Ye, Dong-Rui Fan |
| Předmět: |
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| Zdroj: |
IEEE Transactions on Applied Superconductivity; Jun2018, Vol. 28 Issue 4, p1-5, 5p |
| Abstrakt: |
A 16-bit bit-slice arithmetic logic unit (ALU) is proposed for 32-/64-bit rapid single-flux-quantum microprocessors. It is based on a Ladner-Fischer adder. TheALUcovers all of theALU operations for MIPS32 instructions set. And each of the two 64-bit operands is dividedinto four slices of 16 bits each. The ALU uses synchronous concurrent-flow clocking and consists of 11 pipeline stages. The proposed ALU can be used for any 16n-bit processing. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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