| Autor: |
Proesel, Jonathan E., Toprak-Deniz, Zeynep, Cevrero, Alessandro, Ozkaya, Ilter, Kim, Seongwon, Kuchta, Daniel M., Lee, Sungjae, Rylov, Sergey V., Ainspan, Herschel, Dickson, Timothy O., Bulzacchelli, John F., Meghelli, Mounir |
| Předmět: |
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| Zdroj: |
IEEE Journal of Solid-State Circuits; Apr2018, Vol. 53 Issue 4, p1214-1226, 13p |
| Abstrakt: |
This paper presents a 32 Gb/s non-return-to-zero optical link using 850-nm vertical-cavity surface-emitting laser-based multi-mode optics with 14-nm bulk FinFET CMOS circuits. The target application is the integration of optics on to the first-level package, connecting high-speed optical I/O directly to an advanced CMOS host chip (e.g., processor and switch) to increase package I/O bandwidth density and lower overall system power and cost. The optical link is designed for maximum link margin to tolerate high optical losses created by low-cost optical packaging. The transmitter (TX) uses a three-tap, 1/2-unit-interval-spaced feed-forward equalizer to improve eye opening. The receiver (RX) uses a low-bandwidth, low-noise transimpedance amplifier and a speculative one-tap decision-feedback equalizer for high sensitivity. The TX and RX power efficiencies are 3.3 and 1.4 pJ/bit, respectively. The TX optical modulation amplitude (OMA) is 1.2 dBm, and the RX sensitivity is −11.7 dBm OMA at a bit error rate of 10−12 with PRBS31 data, providing 12.9-dB link margin. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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