Fast iterative circuits and RAM-based mergers to accelerate data sort in software/hardware systems.

Autor: Sklyarov, Valery, Skliarova, Iouliia, Rjabov, Artjom, Sudnitson, Alexander
Předmět:
Zdroj: Proceedings of the Estonian Academy of Sciences; 2017, Vol. 66 Issue 3, p323-335, 13p
Databáze: Complementary Index