| Autor: |
UPADHYAY, ANUJ, PAL, KIRAT |
| Předmět: |
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| Zdroj: |
Journal of Active & Passive Electronic Devices; 2017, Vol. 12 Issue 3/4, p275-284, 10p |
| Abstrakt: |
In this paper two voltage mode high input impedance filter configurations are presented. The first configuration provides an all pass and low pass transfer function and employs a floating resistor, a grounded capacitor and a single DVCC with two Z- terminals. Second circuit requires three DVCC, one of them having three Z- terminals, two grounded resistors and a grounded capacitor. This circuit provides low pass, high pass, inverted and non inverted all pass transfer functions. The grounded resistors are replaced by a MOS resistor thus realizing a resistor-less configuration with electronic tuning. PSPICE simulation results with 0.18µm CMOS process parameters are presented and are in confirmation with theoretical analysis. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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