| Autor: |
Yu, Hao, De Meyer, Kristin, Schaekers, Marc, Peter, Anthony, Pourtois, Geoffrey, Rosseel, Erik, Everaert, Jean-Luc, Chew, Soon Aik, Demuynck, Steven, Barla, Kathy, Mocuta, Anda, Horiguchi, Naoto, Thean, Aaron Voon-Yew, Collaert, Nadine, Lee, Joon-Gon, Song, Woo-Bin, Shin, Keo Myoung, Kim, Daeyong |
| Předmět: |
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| Zdroj: |
IEEE Transactions on Electron Devices; Dec2016, Vol. 63 Issue 12, p4632-4641, 10p |
| Abstrakt: |
In recent CMOS technology, extreme shrinking of contact area at source/drain regions raises serious concerns of high metal/semiconductor contact resistance. Confronting this problem, we introduce a precontact amorphization implantation plus Ti silicidation technique (PCAI + TiSix) and achieve ultralow contact resistivity ( \rho c ) of (1.3 – 1.5) \times 10^-9 ~\Omega \cdot \text cm^2 on Si:P. This PCAI + TiSix technique utilizes light amorphization (low-energy implantation), thin Ti and TiSix film, and moderate thermal budget (500 °C –550 °C): these features are compatible with modern CMOS manufacturing. Moreover, the PCAI + TiSix-induced \rho c reduction is proved universal on both n- and p-Si. With additional characterizations, we find that the silicidation-induced \rho c variation is not merely a Schottky barrier height tuning effect. The electrical and physical characterizations suggest that the low \rho c is strongly correlated with the formation of interfacial TiSix crystallites between amorphous TiSi alloy and Si. [ABSTRACT FROM PUBLISHER] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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