Soft-error immune switched-load-resistor memory cell.
Autor: | Homma, Noriyuki, Nakamura, Tohru, Hayashida, Tetsuya, Matsumoto, Motoaki, Nakazato, Kazuo, Onai, Takahiro, Tamaki, Youichi, Namba, Mitsuo, Sagara, Kazuhiko, Ikeda, Kiyoji |
---|---|
Zdroj: | 1987 Symposium on VLSI Technology; 1987, p37-38, 2p |
Databáze: | Complementary Index |
Externí odkaz: |