Design of a high speed and low area latch-based comparator in 90-nm CMOS technology having low offset voltage.
Autor: | Nanda, Satyabrata, Panda, Avipsa S., Moganti, G.L.K. |
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Zdroj: | 2015 International Conference on Energy Systems & Applications; 2015, p628-631, 4p |
Databáze: | Complementary Index |
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