A 12.5 Gbps One-Fifth Rate CDR Incorporating a Novel Sampler Based Phase Detector and a DFE.
| Autor: | Maheshwari, Pragya, Kaushik, Suhas, Sakare, Mahendra, Gupta, Shalabh |
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| Zdroj: | 2016 29th International Conference on VLSI Design & 2016 15th International Conference on Embedded Systems (VLSID); 2016, p555-556, 2p |
| Databáze: | Complementary Index |
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