A 6.16Gb/s 4.7pJ/bit/iteration LDPC decoder for IEEE 802.11ad standard in 40nm LP-CMOS.
| Autor: | Motozuka, Hiroyuki, Yosoku, Naoya, Sakamoto, Takenori, Tsukizawa, Takayuki, Shirakata, Naganori, Takinami, Koji |
|---|---|
| Zdroj: | 2015 IEEE Global Conference on Signal & Information Processing (GlobalSIP); 1/1/2015, p1289-1292, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|