Automatic test pattern generation for virtual hardware model using constrained symbolic execution.
| Autor: | Mohamed, Nahla, Safari, Mona, Wahba, Ayman, Salem, Ashraf |
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| Zdroj: | 2015 10th International Design & Test Symposium (IDT); 1/1/2015, p149-150, 2p |
| Databáze: | Complementary Index |
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