Analysis of interconnection reliability of dielectric layer for wafer level chip scale package.
| Autor: | Chiyu Wang, Hsieh, Adren, Yaochen Wang, Pai, Archer, Cheng-Tang Pan, Shao-Yu Wang, Chen-Chih Chiu, Bo-Sheng Wang, Tsung-Lin Yang |
|---|---|
| Zdroj: | 2015 10th International Microsystems, Packaging, Assembly & Circuits Technology Conference (IMPACT); 2015, p344-347, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|