SHA-2 hardware core for virtex-5 FPGA.
| Autor: | Mohamed, Anane, Nadjia, Anane |
|---|---|
| Zdroj: | 2015 IEEE 12th International Multi-Conference on Systems, Signals & Devices (SSD15); 2015, p1-5, 5p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Mohamed, Anane, Nadjia, Anane |
|---|---|
| Zdroj: | 2015 IEEE 12th International Multi-Conference on Systems, Signals & Devices (SSD15); 2015, p1-5, 5p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|