A 60 GHz single-chip 256-element wafer-scale phased array with EIRP of 45 dBm using sub-reticle stitching.
| Autor: | Zihir, Samet, Gurbuz, Ozan D., Karroy, Arjun, Raman, Sanjay, Rebeiz, Gabriel M. |
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| Zdroj: | 2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC); 2015, p23-26, 4p |
| Databáze: | Complementary Index |
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