| Autor: |
Fan, Suyan, Law, Man-Kay, Li, Mingzhong, Chen, Zhiyuan, Ieong, Chio-In, Mak, Pui-In, Martins, Rui P. |
| Předmět: |
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| Zdroj: |
Journal of Circuits, Systems & Computers; Jan2016, Vol. 25 Issue 1, p-1, 21p |
| Abstrakt: |
In this paper, a wide input range supply voltage tolerant capacitive sensor readout circuit using on-chip solar cell is presented. Based on capacitance controlled oscillators (CCOs) for ultra-low voltage/power consumption, the sensor readout circuit is directly powered by the on-chip solar cell to improve the overall system energy efficiency. An extended sensing range with high sensing accuracy is achieved using a two-step successive approximation register (SAR) and delta-sigma () analog-to-digital (A/D) conversion (ADC) scheme. Digital controls are generated on-chip using a customized sub-threshold digital standard cell library. Systematic error analysis and optimization including the finite switch on-resistance, buffer input-dependent delay, and SAR quantization nonlinearity are also outlined. High power supply rejection ratio (PSRR) is ensured by using a pseudo-differential topology with ratiometric readout. The complete sensing system is implemented using a standard 0.18m complementary metal-oxide-semiconductor (CMOS) process. Simulation results show that the readout circuit achieves a wide input range from 1.5pF to 6.5pF with a worst case PSRR of 0.5% from 0.3V to 0.42V (0.67% from 0.3V to 0.6V). With a 3.5pF input capacitance and a 0.3V supply, the stage achieves a resolution of 7.1-bit (corresponding to a capacitance of 2.2fF/LSB) with a conversion frequency of 371Hz. With an average power consumption of 40nW and a sampling frequency of 47.5kHz, a figure-of-merit (FoM) of 0.78pJ/conv-step is achieved. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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