Design of a sample-and-hold analog front end for a 56Gb/s PAM-4 receiver using 65nm CMOS.

Autor: Sadeghipour, Khosrov D., Townsend, Paul D., Ossieur, Peter
Zdroj: 2015 IEEE International Symposium on Circuits & Systems (ISCAS); 2015, p1606-1609, 4p
Databáze: Complementary Index