An algorithm for Via minimization in two layer channel routing of VLSI design.
Autor: | Das, Subrata, Barua, Leena, Choudhury, Nikumani, Khan, Ajoy Kr |
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Zdroj: | 2015 International Conference on Electronic Design, Computer Networks & Automated Verification (EDCAV); 2015, p125-129, 5p |
Databáze: | Complementary Index |
Externí odkaz: |