A 6-bit drift-resilient readout scheme for multi-level Phase-Change Memory.
Autor: | Athmanathan, Aravinthan, Stanisavljevic, Milos, Cheon, Junho, Kang, Seokjoon, Ahn, Changyong, Yoon, Junghyuk, Shin, Minchul, Kim, Taekseung, Papandreou, Nikolaos, Pozidis, Haris, Eleftheriou, Evangelos |
---|---|
Zdroj: | 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC); 2014, p137-140, 4p |
Databáze: | Complementary Index |
Externí odkaz: |