Time interleaved 16 bit, 250MS/s ADC using a hybrid voltage/current mode architecture with foreground calibration.
| Autor: | Haque, Yusuf, Lewis, Donald E., Hales, Rex, Kier, Ryan J., Johancsik, Tracy, Watkins, Paul, Picken, William, Harper, Marcellus, Dujari, Shyam |
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| Zdroj: | ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC); 2014, p59-62, 4p |
| Databáze: | Complementary Index |
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