Simulation of Quantum Dot Flash Gate Stack with Lower Tunneling Voltages.
| Autor: | Dhavse, Rasika, Muhammed, Fyroos, Sinha, Chetna, Mishra, Vivekanand, Patrikar, R. M. |
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| Zdroj: | 2014 International Conference on Devices, Circuits & Communications (ICDCCom); 2014, p1-6, 6p |
| Databáze: | Complementary Index |
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