Memory Design Using a One-Transistor Gain Cell on SOI.

Autor: Ohsawa, Takashi, Fujita, Katsuyuki, Higashi, Tomoki, Iwata, Yoshihisa, Kajiyama, Takeshi, Asao, Yoshiyuki, Sunouchi, Kazumasa
Předmět:
Zdroj: IEEE Journal of Solid-State Circuits; Nov2002, Vol. 37 Issue 11, p1510, 13p, 6 Black and White Photographs, 10 Diagrams, 18 Graphs
Abstrakt: Reports on the development of a memory design using a one-transistor gain cell on silicon-on-insulator. Ability of the cell to achieve a 4F² cell using self-aligned contact technologies; Proof of scalability with respect to a cell signal; Verification of basic operation by device simulation and hardware measurement; Introduction of an array driving method.
Databáze: Complementary Index