| Autor: |
Tanzawa, Toru, Umezawa, Akira, Taura, Tadayuki, Shiga, Hitoshi, Hara, Tokumasa, Takano, Yoshinori, Miyaba, Takeshi, Tokiwa, Naoya, Watanabe, Kentaro, Watanabe, Hiroshi, Masuda, Kazunori, Naruke, Kiyomi, Kato, Hideo, Atsumi, Shigeru |
| Předmět: |
|
| Zdroj: |
IEEE Journal of Solid-State Circuits; Nov2002, Vol. 37 Issue 11, p1485, 8p, 14 Black and White Photographs, 12 Diagrams, 2 Charts, 7 Graphs |
| Abstrakt: |
Reports on the development of a 64–megabit flash memory with flexible block redundancy and fast accurate word-line voltage controller. Introduction of a negative-gate channel-erase NOR flash memory cell technology; Characteristic of the chip; Power supply voltage for flash memories. |
| Databáze: |
Complementary Index |
| Externí odkaz: |
|
