| Autor: |
Kirichenko, Alex F., Vernik, Igor V., Vivalda, John A., Hunt, Rick T., Yohannes, Daniel T. |
| Předmět: |
|
| Zdroj: |
IEEE Transactions on Applied Superconductivity; Jun2015 Part 1, Vol. 25 Issue 3, p1-5, 5p |
| Abstrakt: |
We have designed and demonstrated two versions of an ERSFQ 8-bit parallel adder. ERSFQ is a resistor-free approach to dc biasing of Single Flux Quantum circuits that dissipates orders of magnitude less power than a traditional RSFQ logic while operating and has zero dissipation in inactive mode. The adders were designed for and fabricated with various fabrication processes, including HYPRES's 1.0- \mu\m 4-layer 4.5 \kA/cm^2 process, HYPRES's 0.25- \mu\m 4-layer 4.5 \kA/cm^2 process, HYPRES's 0.25- \mu\m 6-layer 4.5 \kA/cm^2 planarized process, and MIT Lincoln Lab's 0.25- \mu\m 4-layer 10 \kA/cm^2 process. These circuits serve as a good LSI fabrication process benchmark. We describe design and report on test results of all versions of the adder. [ABSTRACT FROM PUBLISHER] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
|
