Part 4: Phase-Locked Loops: A 200-MHz CMOS Phase-Locked Loop with Dual Phase Detectors.
| Autor: | WARE, KURT M., HAE-SEUNG LEE, SODINI, CHARLES G. |
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| Zdroj: | Monolithic Phase-Locked Loops & Clock Recovery Circuits; 1996, p292-300, 9p |
| Databáze: | Complementary Index |
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