A Low-Noise X-ray Astronomical Silicon-On-Insulator Pixel Detector Using a Pinned Depleted Diode Structure.

Autor: Kamehama H; Information and Communication Systems Engineering, National Institute of Technology, Okinawa College, Okinawa 905-2171, Japan. hkame@okinawa-ct.ac.jp., Kawahito S; Research Institute of Electronics, Shizuoka University, Shizuoka 432-8011, Japan. kawahito@idl.rie.shizuoka.ac.jp., Shrestha S; Research Institute of Electronics, Shizuoka University, Shizuoka 432-8011, Japan. sumeet@idl.rie.shizuoka.ac.jp., Nakanishi S; Research Institute of Electronics, Shizuoka University, Shizuoka 432-8011, Japan. snakani@idl.rie.shizuoka.ac.jp., Yasutomi K; Research Institute of Electronics, Shizuoka University, Shizuoka 432-8011, Japan. kyasu@idl.rie.shizuoka.ac.jp., Takeda A; Department of Applied Physics and Electronic Engineering, University of Miyazaki, Miyazaki 889-2192, Japan. takeda@astro.miyazaki-u.ac.jp., Tsuru TG; Department of Physics, Kyoto University, Kyoto 606-8502, Japan. tsuru@cr.scphys.kyoto-u.ac.jp., Arai Y; High Energy Accelerator Research Organization, Tsukuba, Ibaraki 305-0801, Japan. yasuo.arai@kek.jp.
Jazyk: angličtina
Zdroj: Sensors (Basel, Switzerland) [Sensors (Basel)] 2017 Dec 23; Vol. 18 (1). Date of Electronic Publication: 2017 Dec 23.
DOI: 10.3390/s18010027
Abstrakt: This paper presents a novel full-depletion Si X-ray detector based on silicon-on-insulator pixel (SOIPIX) technology using a pinned depleted diode structure, named the SOIPIX-PDD. The SOIPIX-PDD greatly reduces stray capacitance at the charge sensing node, the dark current of the detector, and capacitive coupling between the sensing node and SOI circuits. These features of the SOIPIX-PDD lead to low read noise, resulting high X-ray energy resolution and stable operation of the pixel. The back-gate surface pinning structure using neutralized p-well at the back-gate surface and depleted n-well underneath the p-well for all the pixel area other than the charge sensing node is also essential for preventing hole injection from the p-well by making the potential barrier to hole, reducing dark current from the Si-SiO₂ interface and creating lateral drift field to gather signal electrons in the pixel area into the small charge sensing node. A prototype chip using 0.2 μm SOI technology shows very low readout noise of 11.0 e - rms , low dark current density of 56 pA/cm² at -35 °C and the energy resolution of 200 eV(FWHM) at 5.9 keV and 280 eV (FWHM) at 13.95 keV.
Competing Interests: The authors declare no conflict of interest.
Databáze: MEDLINE
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